中文简介 （Chinese Biography）
李慧敏，算力微电子学院教研助理教授、博士生导师。
一、个人简介
李慧敏（Huimin Li），深圳理工大学算力微电子学院教研助理教授、博士生导师。博士毕业于荷兰代尔夫特理工大学（Delft University of Technology, TU Delft），师从Prof. dr. ir. Inald Lagendijk和Prof. dr. dr. ir. Stjepan Picek。博士毕业后，曾任德国达姆施塔特工业大学（Technical University of Darmstadt, TU Darmstadt）副研究员，合作教授为Prof. Dr.-Ing. Ahmad-Reza Sadeghi。她主要研究面向AI时代的高效与安全计算系统设计，聚焦硬件加速、软硬件协同、芯片与AI算力平台安全，以及AI/LLM/Agent安全与可信部署。研究强调从算法、体系结构、硬件实现到系统部署的协同设计，兼顾理论创新与工程落地，致力于构建兼具高性能、高能效与高安全性的新型计算系统。在加入高校之前，李慧敏曾在华为海思技术有限公司和上海联影医疗科技股份有限公司从事芯片、FPGA 与系统级产品研发工作。她参与过华为海思中频芯片研发；在联影医疗任职期间，作为公司创立早期研发成员，深度参与16排CT系统从立项、研发到量产上市的完整流程，并参与64排CT系统研发与系统联调，具备从芯片、FPGA到系统级产品的全流程工程经验。相关研究成果发表于USENIX Security、NDSS、IEEE TIFS、DAC、DATE、CHES等国际会议与期刊，并参与多项国内外科研项目与学术服务。
二、研究方向
其研究围绕算法—架构—芯片—系统—智能应用贯通的高效安全计算体系展开，主要包括以下四个方向。
1. 硬件加速与芯片实现：面向AI算法、大模型推理、密码算法和隐私计算算法等高计算复杂度任务，研究基于FPGA、SoC和专用芯片的高性能硬件加速设计，重点关注算法到硬件架构的高效映射、并行计算结构、数据通路优化、存储访问优化、低功耗设计、硬件原型验证与芯片实现。
2. 软硬件协同设计与计算机体系结构：面向高效计算需求，研究软硬件协同优化方法与计算机体系结构设计，重点包括基于RISC-V的指令集扩展、专用协处理器设计、软硬件接口、编译与运行时支持，以及面向AI、密码和隐私计算等任务的系统级加速方案。
3. 芯片安全与AI算力平台安全：面向处理器、SoC、FPGA、AI加速器（如GPU、NPU等）和异构算力平台，研究芯片设计与算力系统中的安全威胁、漏洞检测与防护机制，重点关注侧信道攻击与防御、硬件安全验证与测试、微架构安全、可信执行、信息泄露防护，以及AI工作负载下的算力平台安全问题。
4. AI/LLM/Agent 安全与可信部署：面向大模型与智能体系统，研究AI应用在模型调用、工具使用、数据流转和系统部署过程中的安全与可信问题，重点关注LLM/Agent安全评测、提示注入攻击与防御、数据与隐私保护、模型滥用检测、工具调用安全，以及面向实际应用场景的可信部署与防护机制。
三、代表性成果与学术服务
围绕体系结构设计、硬件安全与可信计算系统，李慧敏在国际会议与期刊发表多项研究成果，并积极参与国内外科研项目与学术共同体建设。
代表性成果：在体系结构设计、硬件安全、AI算力平台安全等方向发表学术论文20余篇；授权发明专利2项，登记软件著作权3项；研究成果发表于USENIX Security、NDSS、IEEE TIFS、DAC、DATE、FPL 等国际会议与期刊。
科研项目与学术服务：参与欧盟横向项目CROSSCON、ERC项目HYDRANOS、德国DFG重点项目 CROSSING、国家863计划等科研项目；担任USENIX Security、NDSS、CCS、CHES、DATE、FPL、IEEE TIFS、IEEE TCAD、ACM TRETS等国际会议与期刊审稿人；担任Top Picks in Hardware and Embedded Security（Top Picks in HES）程序委员会委员；参与组织HackTheSilicon系列硬件安全竞赛，包括Hack@DAC、Hack@DATE、Hack@CHES等；参与国际学术会议High-Tech Women的组织工作。
四、招生与招聘
课题组长期招收科研助理教授、博士后、博士研究生、硕士研究生、科研助理及实习生。课题组重视扎实的科研训练、开放讨论和长期发展支持，鼓励成员围绕真实系统、开源平台、FPGA/SoC原型和国际/国内合作项目开展研究。团队尊重个体差异，支持成员根据自身兴趣和能力在学术界或工业界发展，并积极为成员拓展与国内外著名高校及工业界研究团队合作交流的机会。
具备计算机体系结构、数字电路、Verilog/SystemVerilog/HLS/Chisel等、FPGA、RISC-V、安全、密码学、机器学习或大模型应用基础的同学均可联系。
简历投递与联系邮箱：lihuimin@suat-sz.edu.cn
English Biography
Efficient and Secure Computing System Design for the AI Era
Dr. Huimin Li is an Assistant Professor and Ph.D. supervisor at the faculty of Computility Microelectronics, Shenzhen University of Advanced Technology, China. She received her Ph.D. from Delft University of Technology, advised by Prof. dr. ir. Inald Lagendijk and Prof. dr. dr. ir. Stjepan Picek. After her Ph.D., she worked as a research associate at the Technical University of Darmstadt, in collaboration with Prof. Dr.-Ing. Ahmad-Reza Sadeghi. Before joining academia, she worked at Huawei HiSilicon and United Imaging Healthcare, where she was involved in chip, FPGA, and system-level product development. Her research focuses on efficient and secure computing system design for the AI era, spanning hardware acceleration, hardware-software co-design, chip and AI computing platform security, and trustworthy deployment of AI/LLM/Agent systems. Her work emphasizes the co-design of algorithms, computer architectures, hardware implementations, system security, and deployable engineering solutions, with the goal of building high-performance, energy-efficient, and secure computing systems for AI, large models, cryptography, and privacy-preserving computation. She has published more than 20 research papers, and holds 2 granted invention patents and 3 registered software copyrights. Her work has appeared in leading conferences and journals, including USENIX Security, NDSS, IEEE TIFS, DAC, DATE, and CHES. She has participated in several international and national research projects, including CROSSCON, HYDRANOS, CROSSING, and China’s National 863 Program.
Research Interests
1. Hardware Acceleration and Chip Implementation. FPGA, SoC, and ASIC-based acceleration for AI algorithms, large-model inference, cryptographic algorithms, and privacy-preserving computation.
2. Hardware-Software Co-design and Computer Architecture. RISC-V instruction-set extensions, domain-specific coprocessors, hardware-software interfaces, compiler/runtime support, and system-level acceleration for AI, cryptography, and privacy-preserving workloads.
3. Chip Security and AI Computing Platform Security. Side-channel attacks and defenses, hardware security verification and testing, microarchitectural security, trusted execution, and information-leakage protection for processors, SoCs, FPGAs, AI accelerators, and heterogeneous computing platforms.
4. AI/LLM/Agent Security and Trustworthy Deployment. Security evaluation, prompt-injection attacks and defenses, data and privacy protection, misuse detection, tool-use security, and practical deployment-oriented defense mechanisms for large language models and AI agents.
Open positions are available for research assistant professors, postdoctoral researchers, Ph.D. students, master’s students, research assistants, and interns. We emphasize hands-on system building, cross-layer co-design, and research problems grounded in real-world hardware and system challenges. Students and researchers in the group will receive close mentorship, structured research training, and strong support for publishing at top-tier international venues. Members are encouraged to develop independent research skills and are provided with opportunities to collaborate with leading research groups worldwide and industry. Applicants with backgrounds in computer architecture, digital IC design, FPGA, system security, or machine learning, as well as those eager to strengthen their system-level and engineering skills, are especially welcome.
Interested applicants are welcome to send their CV to lihuimin@suat-sz.edu.cn.
